LDA Technologies (LDA), the innovation leader in advanced ultra-low latency FPGA and network solutions for capital markets, is pleased to announce that NeoTap X, LDA’s unique off-the-shelf timestamping and tap aggregation solution, has been named the Best Time Stamping/Latency Measurement System in this year’s TradingTech Insight Awards Europe.
A-Team recognizes NeoTap X as the year’s most innovative tool for measuring latency across trading networks and infrastructures. The finalists of each category were selected by the Advisory Board in collaboration with A-Team Group Editors. Winners were then selected through votes cast by financial institution members of the TradingTech Insight community.
Vahan Sardaryan, co-founder and CEO, said: “We are proud to be recognized for the NeoTap X product. NeoTap X resets the industry standards with the highest timestamping precision, outstanding bandwidth, and dedicated features for real-time latency monitoring. Its computing power and integrated storage option reduce reliance on external solutions and make NeoTap X the most versatile, self-contained tap aggregation, capture, and monitoring system on the market.”
Angela Wilbraham, CEO at A-Team Group, and host of the 8th annual TradingTech Insight Awards Europe 2026, commented: "A huge congratulations to LDA Technologies for securing the Best Time Stamping/Latency Measurement System award at the 2026 A-Team Group TradingTech Insight Awards Europe. Now in their eighth year, these awards stand as a true benchmark of excellence and innovation within capital markets technology. They specifically recognize vendors who are driving exceptional change in trading infrastructure, core trading technology, and data solutions
Key Features of the NeoTap X include:
- 48 ports of 10/25/40G for passive and active tap aggregation and timestamping with a precision of 100 ps.
- 2 ns of port-to-port latency as an active tap through the internal Layer-1 switch
- In-band timestamping feature via a cutting-edge FPGA with industry-leading latency, perfect for real-time latency monitoring
- 96 GB of memory available to the FPGA for aggregated packet buffering prior to retransmission over four 100 GbE links.
- 60 TB of storage is available to retain packets for further processing.
- Up to two internal FPGA boards can be configured to provide future-proof capabilities, with a full layer-1 mesh between all ports and FPGAs.
